Lexra Announces NetVortex PowerPlant -NVP- Chip for OC192/OC768 Network Processing
SAN JOSE, Calif.--(BUSINESS WIRE)--June 14, 2001--Lexra, a leading
developer of system-on-chip (SOC) processor cores, today announces
that it will deliver a chip version of the world's only licensable
Network Processing Unit (NPU) architecture. The NetVortex PowerPlant
(NVP) will allow Lexra licensees to develop prototype systems before
their ASICs are available, and allow them to go to field trial more
than one year earlier.
Network communication systems designers have licensed NetVortex to
build proprietary Network Processing Unit (NPU) ASICs as a way to
differentiate from other systems designers merely integrating
off-the-shelf merchant chips. However, this approach has in the past
meant differentiation at the cost of time-to-market, because the
systems development would be delayed by the availability of the ASIC.
With NVP, Lexra has solved this problem.
``We are very excited to make NVP available,'' said Charlie Cheng,
President and CEO of Lexra. ``Our customers are the world's largest
communications equipment makers. They add value and build competitive
advantage by creating their own custom ASICs. In the past, they
sacrificed time to market for this competitive edge. Now our licensees
can have the most differentiable NPU technology in the market without
sacrificing any time-to-market. The NVP will really help many systems
companies we have engaged.''
The NVP is targeted at OC192/OC768 (or 10 Gbps to 40 Gbps) network
routing applications, at both the core and edge of the network as well
as inside the data center. The fragmentation of the market and the
immaturity of merchant chip supply have created the interest to
license NetVortex. Now with the NVP, licensees can enter the field
trial period lasting over six months while designing their proprietary
ASICs with NetVortex.
NVP Overview
The NVP is a chip implementation of Lexra's NetVortex licensable
NPU architecture, and is intended to be a general purpose NPU chip
covering multiple applications, and multiple system design
philosophies. As such, the NVP uses a high-performance NetVortex
configuration coupled with industry standard I/O and peripheral
interfaces in a leading edge silicon manufacturing and packaging
technology.
At the heart of the NVP is the sixteen way-symmetric
multiprocessor NetVortex subsystem. Each processor is a 420 MHz (worst
case operating condition) LX8380 packet processor. The LX8380 runs
MIPS® I(A) instructions (except non-aligned loads and stores are not
supported in hardware or software) with Lexra's proprietary extensions
optimized for network communications. These new instructions include
operations for bit field manipulation, packet check-sum, and most
importantly, support for hardware multi-threading. Multi-threading
enables the LX8380 to switch context from one packet to another while
waiting for slower memory devices such as off-chip CAM and SRAM chips.
Each LX8380 has 16 Kbytes each of instruction and dual-ported data
memory. The dual-port data memory provides maximum bandwidth to keep
the LX8380 from stalling. The result is that the NVP can classify and
forward 33 million layer 3 packets per second.
The sixteen LX8380 CPUs share two types of resources through two
different interfaces: the Block Transfer Controller (BTC) and crossbar
switch. The Lexra proprietary BTC allows packets to transfer to/from
the LX8380's dual-port data memory with minimal interruption, and
provides 108 Gbps of bandwidth, more than sufficient for OC192c
requirements. The crossbar switch allows all sixteen LX8380s to access
shared peripheral devices such as CAM and SRAM in parallel. The
parallel access nature of the high-performance crossbar switch is one
of the major strengths of the NVP, providing almost 270 Gbps of data
bandwidth.
``The NVP is, by far, the most flexible high-performance NPU
architecture today,'' said Pat Hays, Lexra's CTO. ``General-purpose RISC
CPUs provide the flexibility and specialized NPUs provide the
performance. But NVP achieves its high-performance without sacrificing
flexibility. The Block Transfer Controller and crossbar switch
together with hardware multi-threading, allow the CPUs to operate
efficiently. The CPU performance, packet bandwidth and the bandwidth
to peripheral devices have been carefully balanced, each with
sufficient headroom to support a wide spectrum of OC-192c
applications.''
Lexra has leveraged industry-standard interfaces to allow easy
integration of the NVP into a line card design. First, it uses a pair
of the emerging SPI-4 specification to connect to ingress and egress
packet traffic. For peripheral connection, there are five interfaces
to off-chip peripherals: one CAM, three high speed QDR SRAMs, and one
PCI device. In addition, the NVP also has 128 Kbytes of high speed
on-chip SRAM for the sixteen LX8380s to share. These peripheral
devices together provide enough data bandwidth for the NVP to perform
the necessary table look-ups, context data manipulation, and QoS
decisions for OC192c class routers.
Specification, Pricing, and Availability
The NVP will be manufactured in a leading edge 0.13 um process.
This process should be coming on-line in the second half 2001. The
134-square-millimeter die will be packaged in an 1157 pin BGA package.
It will run at 420 MHz in worst-case condition, and dissipate 12W of
power (worst case). The quantity 1,000 price for NVP will be $850,
available in the first half of 2002.
About Lexra
Lexra, Inc. is a leading microprocessor developer specializing in
32-bit RISC and DSP cores for the embedded market. In less than four
years, Lexra has established itself as an innovator in embedded
microprocessor technology and intellectual property (IP) licensing
business model, with proven track record for customer success. During
this short period, Lexra has delivered seven different processors to
30 licensees in six different countries. Among the customers are major
network communication companies as well as top ten semiconductor
companies. Lexra is headquartered in San Jose, Calif. Further company
information can be found at http://www.lexra.com.
(A) MIPS, MIPS I, MIPS16, R3000, and other MIPS common law marks are
trademarks and/or registered trademarks of MIPS Technologies, Inc.
Lexra, Inc. is not associated with MIPS Technologies, Inc. in any way.
Unaligned loads & stores are not supported in hardware or software.
Contact:
Lexra, Inc., San Jose
Jonah McLeod, 408/573-1890 x-617
mcleod@lexra.com
or
Press Contact:
Shelton Communications Group, Dallas
Katie Olivier, 972/239-5119
kolivier@sheltongroup.com
Popularity Rating for this story - |
|
|